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/GCC 4

3.17.32 NDS32 Options

These options are defined for NDS32 implementations:

-mbig-endian
Generate code in big-endian mode.
-mlittle-endian
Generate code in little-endian mode.
-mreduced-regs
Use reduced-set registers for register allocation.
-mfull-regs
Use full-set registers for register allocation.
-mcmov
Generate conditional move instructions.
-mno-cmov
Do not generate conditional move instructions.
-mperf-ext
Generate performance extension instructions.
-mno-perf-ext
Do not generate performance extension instructions.
-mv3push
Generate v3 push25/pop25 instructions.
-mno-v3push
Do not generate v3 push25/pop25 instructions.
-m16-bit
Generate 16-bit instructions.
-mno-16-bit
Do not generate 16-bit instructions.
-mgp-direct
Generate GP base instructions directly.
-mno-gp-direct
Do no generate GP base instructions directly.
-misr-vector-size=num
Specify the size of each interrupt vector, which must be 4 or 16.
-mcache-block-size=num
Specify the size of each cache block, which must be a power of 2 between 4 and 512.
-march=arch
Specify the name of the target architecture.
-mforce-fp-as-gp
Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization.
-mforbid-fp-as-gp
Forbid using $fp to access static and global variables. This option strictly forbids fp-as-gp optimization regardless of -mforce-fp-as-gp.
-mex9
Use special directives to guide linker doing ex9 optimization.
-mctor-dtor
Enable constructor/destructor feature.
-mrelax
Guide linker to relax instructions.

© Free Software Foundation
Licensed under the GNU Free Documentation License, Version 1.3.
https://gcc.gnu.org/onlinedocs/gcc-4.9.3/gcc/NDS32-Options.html